Fan Zhang, Zhejiang University, China
Prefessor Fan (Terry) Zhang was born in Hang Zhou, a beautiful city in China. After finishing his high school (HangZhou High School) in 1994, he studied Computer Science & Technology majoring in software engineering at the Xi'an Jiaotong University in Shanxi Province, China. In 2001, he was admitted by the School of Information Security and Engineering at Shanghai Jiaotong University in Shanghai, China. He finished his studies in 2004 with a master thesis on 'Identity Authentication and Access Control Based On Smart Card'. His supervisor was ShenSheng, Zhang. In 2011, he graduated from the Department of Computer Science and Engineering at University of Connecticut, USA. His major advisor was Professor Zhijie Jerry, Shi. And his associate advisors were Professor Aggelos Kiayias and Professor Sanguthevar Rajasekaran. His final Ph.D thesis is 'Towards Comprehensive Countermeasures to Power Analysis Attacks'. In 2014, he joined the College of Information Science & Electronic Engineering at Zhejiang University. His major research interstes is the general cyber security which includes haredware security, system security, network security and more. His special expertises are in the domain of side channel attacks (SCA) and countermeasures, fault attacks, cryptography, and computer architecture. Nowadays, his research interests move to the direction of comibing SCA with binary analysis and network attacks, and some interesting topics in blockchain.
University of Alberta, Canada
Jie Han received the B.Sc. degree in electronic engineering from Tsinghua University, Beijing, China, in 1999 and the Ph.D. degree from the Delft University of Technology, The Netherlands, in 2004. He is currently a Professor in the Department of Electrical and Computer Engineering at the University of Alberta, Edmonton, AB, Canada. His research interests include approximate computing, stochastic computing, reliability and fault tolerance, nanoelectronic circuits and systems, novel computational models for nanoscale and biological applications. Dr. Han was a recipient of the Best Paper Award at the International Symposium on Nanoscale Architectures (NanoArch) 2015 and Best Paper Nominations at the 25th Great Lakes Symposium on VLSI (GLSVLSI) 2015, NanoArch 2016 and the 19th International Symposium on Quality Electronic Design (ISQED) 2018. He was nominated for the 2006 Christiaan Huygens Prize of Science by the Royal Dutch Academy of Science. His work was recognized by Science, for developing a theory of fault-tolerant nanocircuits (2005). He is currently an Associate Editor for the IEEE Transactions on Emerging Topics in Computing (TETC), the IEEE Transactions on Nanotechnology, the IEEE Circuits and Systems Magazine, the IEEE Open Journal of the Computer Society, and Microelectronics Reliability (Elsevier Journal).
Chixiao Chen, Fudan University, China
Chixiao Chen received the B.S. and Ph.D. degrees in Microelectronics from Fudan University, Shanghai, China in 2010 and 2016, respectively. He was an exchange student in the University of California, Davis during 2008 to 2009. In 2015, he worked at Calterah Inc. as an analog circuit designer. From 2016 to 2018, he was a post-doctoral research associate with the University of Washington, Seattle. Since 2019, he has been an Assistant Professor with Fudan University, Shanghai, China. Chixiao’s research interest includes mixed-signal integrated circuit design and custom intelligent software-hardware co-designs. He received STGA award on ISSCC 2014 and Shanghai Rising Star Program.
Zhongdong Qi, Xidian University, China
Zhongdong Qi is a tenure-track associate professor at Xidian University. He received the B.Eng. degree and Ph.D. degree in Computer Science from Tsinghua University. He was a postdoctoral research fellow and a visiting project scientist at University of California, Riverside. His research interests include physical design, modelling and algorithm design in electronic design automation, and machine learning. He received a Best Paper Award Nomination at International Conference on Computer Design, 2014. He and his team also won 3rd place in International Conference on Computer-Aided Design Contest (Problem B), 2020.
Teruo Suzuki, Socionext Inc., Japan
Teruo Suzuki received a B.S. degree in electrical engineering in 1989 from Nagoya Institute of Technology, and received his PhD from Tsukuba University in 2013. In 1989, he joined Fujitsu Ltd., where he started designing ESD protection circuits in 2002 after working to develop several ASSP products for Ethernet LAN controllers and launching a few processes for Fujitsu supercomputers. In 2015, he moved to Socionext Inc., where he develops and designs ESD protection devices and circuits as a manager of the entire organization. He has been one of the core members of the Industry Council on ESD target levels since its inception. He is also a member of the Technical Program Committees of the USA EOS/ESD Symposium, the IEEE International Reliability Physics Symposium (IRPS), the IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), the European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF) and the Taiwan ESD and Reliability Conference (TESAC). He has been the general chair of the Reliability Center for Electronic Components of Japan (RCJ) EOS/ESD/EMC Symposium in Tokyo, Japan since 2010. He received the RCJ EOS/ESD/EMC Symposium Best Paper award in 1996, 1998 and 2004. He received the Excellent Paper Award from the 5th IEEE & 6th The International Conference on Science, Education, and Viable Engineering (ICSEVEN) in 2019.
Shanghai Jiao Tong University, China
Jiang Li is an Associate Professor in the Department of Computer Science & Engineering at Shanghai Jiaotong University. He obtained his Ph.D and MPHIL degree in the Department of Computer Science & Engineering at The Chinese University of HongKong, in 2013 and 2010 respectively. He received his B.E. degree in Computer Science & Engineering from Shanghai Jiaotong University, China in 2007.
His research interests include below:
- DNN Acceleration, application-driven and accelerator-friendly DNN training
- Data mining and machine learning techniques in cloud/server system reliability/performance and chip design
- Computer Aided Design, Computer Architecture
Southwest Jiaotong University, China
Professor ZhiXiong DI is Associate Director of the Department of Electronic Engineering in the school of School of Information Science and Technology Southwest Jiaotong University. He received the Ph.D degree in microelectronic and solid electronics from Xidian University in 2014. His current research interests include High-performance VLSI/SoC design methodology, CAD algorithm of digital IC physical implementation.
Maurizio Palesi, University of Catania, Italy
Maurizio Palesi is an Associate Professor in Computer Engineering at University of Catania, Italy. His research activity is focused in the area of embedded systems with particular emphasis on single-chip implementations based on the network-on-chip design paradigm. He has served as Guest Editor of 30 special issues in top-level journals. He has served as General Chair and TPC Co-Chair in several international conferences and workshops. He serves as Associate Editor in 15 international journals. He has been recipient of the best paper award at the DATE 2011 and the HiPEAC paper award 2014. He is member of the HiPEAC and IEEE Senior Member.
Mar Baselios College of Engineering and Technology,India
Beihang University, China
South China University of Technology
University of Electronic Science and Technology of China